1. Field of the Invention
The present invention relates to a low noise amplifier, and more particularly, to a low noise amplifier with low circuit complexity, low noise figure, and high linearity.
2. Description of the Prior Art
As technology evolves, wireless communication is an important part of human life. Various electronic devices, such as smart phones, smart wearable devices, tablets, etc., utilize wireless radio frequency (RF) systems to transmit and receive wireless signals. A low noise amplifier (LNA) is a necessary amplifier in a receiver of the wireless RF system. Performance of the LNA affects performance of the overall wireless RF system. Moreover, signal linearity and noise figure are key performance metrics of the LNA.
In the prior art, LNA circuits using cascoded circuit topology, active bias network, parallel type transconductance compensation, and envelope tracking are provided to improve the signal linearity thereof. The cascoded circuit topology has the advantages of high frequency gain and noise figure improvement. However, using cascoded circuit topology relies on a high voltage supply, such that each transistor would have low noise and high power saturation properties, which could suffer inconvenience in LNA design. In addition, using an active bias network to LNA may have high frequency gain, and automatically adjust bias according to an operating output power of the LNA. However, the LNA using an active bias skill has more circuit complexity and suffers higher direct current (DC) power consumption. Furthermore, such skill is sensitive to device characteristic variation due to semiconductor manufacturing processes, causing inconvenience in designing and manufacturing. In addition, the parallel type transconductance compensation may adjust the bias condition and generate a mixed output signal through two transistors connected in parallel, so as to achieve a compensation on third-order intermodulation (IMD3), which improves an overall signal linearity of the LNA. However, capacitance at both the input and output ports of the LNA would be increased, which could influence the high frequency performance, i.e., high frequency impedance matching or high frequency signal gain. In addition, the envelope tracking architecture provides a dynamic bias control under different operating powers via feedback sensing network and digital controller, which improves the DC and RF power efficiencies. However, using envelope tracking requires more active and inactive components such as analog and digital control circuits, which could increase the circuit complexity and production cost of the LNA circuit.
On the other hand, in the prior art, LNA circuits using cascoded circuit topology, active feedforward topology, and input active load are provided to improve the noise figure thereof. Theoretically, the LNA using cascoded circuit topology itself has good noise figure performance. However, a biasing network at input port with using a feed-in inductance or a feed-in resistance to provide voltage or current brings a degraded noise figure performance, because the equivalent thermal resistance induces an additional thermal noise. In addition, although the active feedforward topology has an improvement in the noise figure, nevertheless, complicated circuit design with more DC biases is required to compensate the internal noise of the LNA, which is meaning that DC power consumption will be presented. Using input active load to LNA circuit has the advantages of wideband noise impedance matching and lower power operations. The LNA may be applied to wideband wireless system by properly adjusting bias of transistors and by choosing sizes of the transistors. However, the linearity performance is needed to be taken into account due to the large-signal characteristic and behavior of the input active load circuit.
Therefore, how to provide a low noise amplifier with low circuit complexity, low noise figure and high signal linearity is a significant objective in the field.